Three-dimensional vertical NAND strings having one bit per cell are disclosed in an article by T. Endoh et al., titled “Novel Ultra High Density Memory With A Stacked-Surrounding Gate Transistor (S-SGT) Structured Cell”, IEDM Proc. (2001) 33-36.
Mobility of minority charge carriers in the vertical channel of a three-dimensional memory device can limit the current through a vertical field effect transistor, and can adversely impact the operational speed of the three-dimensional memory device. Scattering at grain boundaries of a polycrystalline semiconductor material within the vertical channel is a significant factor that reduces the charge carrier mobility.